The present invention relates to an information processing apparatus, and more particularly to an information processing apparatus adopting an organization method and an access method for registers which are well suited to a case where the access times of the registers are much shorter than the access time of a main memory.
Heretofore, in a computer system furnished with a large number of registers, a method of assigning the individual registers has been discussed in, for example, D. A. Patterson and C. H. Sequin: A VLSI RISC, Computer Sep. 1982, IEEE (pp. 8-21) and has generally been realized in the form of a RISC I-microprocessor (hereinbelow, abbreviated to "RISC I").
In the RISC I, there are banks of 32 logical registers which can be assigned by instructions, and a total of 138 physical registers exist. Letting L.sub.0, L.sub.1, . . . and L.sub.31 denote the logical registers to be assigned by the instructions, and letting R.sub.0, R.sub.1, . . . and R.sub.137 denote the physical registers, the registers L.sub.0, L.sub.1, . . . and L.sub.9 correspond respectively to registers R.sub.0, R.sub.1, . . . and R.sub.9 at all times. The registers L.sub.10, L.sub.11, . . . and L.sub.31 are respectively held in correspondence with registers R.sub.116, R.sub.117, . . . and R.sub.137 at the time of initialization. However, they are respectively brought into correspondence with the registers R.sub.100, R.sub.101, . . . and R.sub.121 after the call of the first subprogram, and with the registers R.sub.84, R.sub.85, . . . and R.sub.105 after the call of a subprogram directly below the level of the first subprogram. In this manner, the correspondence of the registers is shifted downwards or advanced by 16 registers in conformity with the nest level of the subprogram call. At the time of return from a subprogram, the correspondence is brought back upwards or retracted by 16 registers. The logical registers L.sub.26, .sub.27, . . . and L.sub.31 before the subprogram call indicate the same physical registers as those corresponding to the registers L.sub.10, L.sub.11, . . . and L.sub.15 after the subprogram call, respectively.
In this fashion, partly different register sets are utilized in accordance with the nest levels of the subprogram calls, thereby intending to lessen the "save" and "restore" operations of the registers. When the number of the nest levels of the subprogram calls becomes large and the physical registers are used up, interruption arises.
With the prior art as stated above, the following problems are involved: (a) A register area to be used is shifted upwards or downwards (advanced or retracted) by a fixed amount only when a subprogram is returned or called, and it is not considered at all to change a register position for use in adaptation to the property of a program or to a programming form, so that the efficient utilization of registers cannot be attained. (b) Large quantities of physical registers need to be saved and restored when a task is switched, and further increase in the number of physical registers does not lead to an increase in speed. (c) When physical registers have been used up, register saving, etc. operations are executed by an interrupt handling routine, and hence, a long time is expended for processing.
Among them, the item (b) poses a problem in that the high-density integration technology of LSI's cannot be fully exploited.